As complexity and performance of IC and Very Large Scale Integration (VLSI) circuit increases, time delay due to interconnects is becoming as significant as that of logic gates. Interconnect resistance (or wire resistance) is one of the important parameters for such a time delay calculation and other circuit characterization. The adoption of Chemical Mechanical Polishing (CMP) makes interconnect thickness sensitive to the local metal density. This leads to design limits on the metal density, and the introduction of nonmetal slots in large metal structures, such as wide metal lines as shown in FIG. 1A. The resistance of these complicated structures is difficult to calculate.
Interconnects are typically formed with a thin-film, i.e., a two-dimensional metal or conductor layer. Thus, interconnect resistance is typically calculated using the sheet resistance Rs, which is measured in Ohms per square (Ω/□). The sheet resistance Rs takes the material properties and thickness into account, and the resistance of a square unit of material is the same for a square of any size. Thus, the resistance of a conductor layer is calculated as the product of the sheet resistance Rs and the number of squares S. However, there are no formulas for the number of squares S except for conductor layers having the simplest geometry such as a rectangle.
FIG. 1B schematically illustrates a simple rectangular conductor having a length L and a width w. The current flows through the length L from one end to the other, perpendicular to the width w. In this case, the number of squares S is given as S=L/w. However, conductor shapes can be more complicated, for example, as shown in FIG. 1C. Suppose that the current enter the conductor from one edge 11 to another edge 13, current paths need not be straight. This makes it difficult to define a length and a width of the conductor shape, and renders the resistance calculation inaccurate.
The importance of parasitic capacitance due to interconnects has been recognized to the extent that a number of efficient and specialized capacitance solvers exist. However, this is not the case for interconnect resistance. Conventionally, a resistance calculation must use a general field solver, such as Raphael, available from Synopsys Corporation, Mountain View, Calif., which uses finite element, finite difference, or boundary element analysis.
Conformal transformations can be used to calculate the resistance of some two-dimensional (thin film) structures. For example, Hall, P. M., “Resistance Calculations For Thin Film Patterns”, Thin Solid Films, 1, 1967–68, pp. 277–295 describes such conformal transformations. When this approach is feasible, it can be accurate and very fast. However, conformal transformations generally assume specific constant potential surfaces, which might not conform to the specific system at hand. Moreover, this technique does not extend to three dimensions.
Accordingly, the present invention provides a fast and accurate interconnect resistance solver which uses a variational method and is capable of extending to three-dimensional calculations.